With functional verification consuming more time and effort than design, the chip industry is looking at every possible way to make the verification process more effective and more efficient.

AI data centers are starting to replace copper with co-packaged optics in an effort to reduce energy consumed per bit and ...

AI workloads require rapid access to vast amounts of data, made possible by integrating HBMs. This approach, combining two, ...

A new technical paper, “Performance Analysis of Edge and In-Sensor AI Processors: A Comparative Review,” was published by University of Austria and ETH Zurich. Abstract “This review examines the ...

A new technical paper, “Towards Structured Training and Validation of AI-based Systems with Digital Twin Scenarios,” was ...

Moore’s Law has shifted toward advanced packaging over the past few years, but the limits of that approach are just now coming into focus. AI and HPC designs are growing larger ...

Liquid cooling is proving effective at cooling high-power chips, such as GPUs, but it’s creating thermal issues for other nearby chips that previously benefited from the airflow ...

As ATE systems become increasingly complex and data-intensive, traditional rule-based optimization methods struggle to keep ...

High‑NA EUV's reduced field size is driving new innovation in optical proximity correction and mask synthesis.

Three AI data center scaling strategies are scale-up, scale-out, and scale-across. Scale-up is within a rack; scale-out is ...

The merger of xAI and SpaceX, the efforts by some startups, and research by Google have raised the question of when there ...

The high power density in turn produces large thermal gradients, with the low to max temperature changes increasing ...