A smaller version of existing 16nm technology According to industry sources, TSMC is planning to introduce a 12 nanometer half-node process to enhance competition with 28nm and lower process nodes… A ...

TSMC's board of directors approves spending on new production capacities and promotes a key executive leading the development of A10 fabrication process due in 2030 or later.

HAIFA, Israel--(BUSINESS WIRE)--proteanTecs®, a global leader in advanced analytics for semiconductor health and performance monitoring, today announced the successful silicon-proven validation of its ...

The compute tile of Intel's Nova Lake CPU will be slightly smaller than compute tile of Arrow Lake CPU, but will likely be ...

Ansys secured an award in the category of Joint Development of 2nm and N3P Design Infrastructure for delivering foundry-certified, state-of-the-art power integrity and reliability signoff verification ...

Accelerates Pathway to Ultra High-Speed 1.6Tbps Bandwidth for Build Out of the Next Generation of Cloud Computing, AI, and Hyperscale Networks SAN JOSE, Calif.--(BUSINESS WIRE)-- Credo Technology ...

A new report suggests TSMC’s 2nm process may bring smaller-than-expected gains in power, performance, and area despite its next-gen branding. If true, the reduced complexity could keep wafer pricing ...

The chipmaker wants to pull ahead of TSMC with a big bet on ASML's cutting-edge systems.

Vanguard International Semiconductor (VIS) announced on 28 January that it had signed a technology licensing agreement with TSMC covering 650V high-voltage and 80V low-voltage GaN process technologies ...

The new 224G PAM4 IP offering brings Credo’s high-performance, power-efficient SerDes technologies with fabrication on an industry-leading advanced process technology from TSMC to provide the ...