EDN

Optimize inter-processor communication in dual baseband dual mode handsets

With the onset of globalization, world travel today is prevalent be it for business or leisure; and with travel comes the process of planning to carry the basic essentials and gadgets for the trip.
Design-Reuse

Performance Evaluation of Inter-Processor Communication Mechanisms on the Multi-Core Processors using a Reconfigurable Device

Recently, multi-core processors have been featured in embedded field. Especially, with regard to reconfigurable devices, several system constructions can be implemented easily. The Real-Time OS(RTOS) ...
insideHPC

Fujitsu Develops 32 Gbps Transceivers for Inter-Processor Communications

This week Fujitsu Laboratories announced the development of transceiver circuits capable of communicating at 32 Gbps, a world record. The company said the new technology will support inter-processor ...
Electronic Design

What’s Best for Your Multicore Design—a Hypervisor or Multicore Framework?

Pros and cons of using a hypervisor. Pros and cons of multicore frameworks. Today’s multicore system-on-chip (SoC) hardware offers the promise of being able to pack more into your embedded project ...
Design-Reuse

Xilinx and Crossbow Technologies Announces Parallel Processing Fabric IP for Programmable System Design

2D-fabric provides glueless interface to Xilinx MicroBlaze soft processor, embedded Virtex-II Pro IBM PowerPC processors, and IBM CoreConnect bus SAN JOSE, Calif., October 16, 2002 - Xilinx, Inc.