Designing the hardware-software interface. Dealing with "bytes enables" in RTL verification. Automating the HSI design process across the entire dev team. The hardware-software interface (HSI) holds ...

HSI is a critical capability that now has the full attention of the Accellera PSWG and whose absence results in extra work for companies that want to adopt Portable Stimulus tools without some form of ...

In today’s semiconductor landscape, scale is becoming a bigger battleground—not only for chipmakers, but increasingly for hyperscalers, cloud giants, and other systems companies, too. They're all ...

Designing hardware and software simultaneously is a key factor in reducing time-to-market. Although some vendors are talking about tools to facilitate the task, we still have a long way to go before ...

From the earliest days of my career, when designing chips, I have always navigated the interface between hardware and software for semiconductor design in my roles. My initial chip designs included ...

Impulse Accelerated Technologies, Inc. announced the newest edition of its CoDeveloper” C to RTL design tools, which adds support for Altera's SOPC Builder and the Quartus II, Version 4.1 design ...

As technology moves toward System-on-a-Chip (SoC) integration, the missing links between system-level specification and design implementation will have a major impact on the designer’s productivity ...

Native Instruments today announced its new (and first) integrated hardware / software DJ system with a YouTube video wherein DMC World Champ DJ Shiftee rocked out to the Tetris theme and samples from ...

Here on Hackaday, we’re generally designers of hacks that live in the real world. Nevertheless, I’m convinced that some of the most interesting feats are at the mercy of what’s possible in software, ...

Having SoC for HDTV under verification, verifying different components of SoC at block level are so far satisfactorily done using simulation. Now having full chip level environment and run-ning ...