With silicon clock scaling largely dead thanks to the laws of physics, computer scientists and chip designers have had to search for performance improvements in other areas -- typically by improving ...

In addition to the cache-coherence protocol discussed here, Sun already used formal verification successfully to verify other protocol-related problems. Architecture-level protocol verification is a ...

Cache coherency, a common technique for improving performance in chips, is becoming less useful as general-purpose processors are supplemented with, and sometimes supplanted by, highly specialized ...

One of the key challenges in chip multi-processing is to provide a programming model that manages cache coherency in a transparent and efficient way. A large number of applications designed for ...